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Apple FE Engineer United States, California, Cupertino 261367078
Yesterday
- Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field and 3 years of experience in the job offered or related occupation.
- 3 years of experience with each of the following skills is required:
- Experience in designing and implementing low-power designs, including experience in clock and power gating, retention vs. non-retention study, and advanced clock gating design.
- Experience in Advance Power Intent, including UPF implementation of complicated power gating designs.
- Experience in Static Timing Analysis, including timing closure in high frequency and multi-voltage design.
- Experience in various design tradeoffs between area, power, and performance.
- Utilizing Python and tcl, and experience in design methodology flow with automation.
- Computer architecture and micro-architecture to deliver the best design solution for complicated SoC design.
- Experience discussing advanced design topics between different teams on design ideas and design tradeoff choices.
- Experience in RTL languages such as Verilog and SystemVerilog.
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