Intel Design Automation QA Engineer 

Taiwan, Taiwan Province, Hsinchu 

257399942

Job Description:

• About the Group: As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO.

• IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with Arm and RISC-V ecosystem IPs.

Responsibility:

• Intel Foundry Services (IFS) team is looking for independent, self-motivated candidates familiar with SOC/IP/ASIC design and methodology, having expertise in one or more areas of circuit/layout design, Timing/Reliability/EMIR/Physical/ESD verification, as well as robust programming skills.

• In this role, you will collaborate closely with the PDK Development Team, defining Quality Assurance (QA) Test Plans and driving innovation to optimize automation, tools, and methodologies.

• Your focus will be on minimizing manual testing efforts, maintaining and executing the QA flow to generate comprehensive test reports for collateral release.

• This includes design kits, run sets, and libraries, enabling continuous quality monitoring and corrective actions with internal development teams.

• Additionally, you will build automation flows to assess design kit quality with customer use models, manage customer acceptance tests, and incorporate new use models and test cases into the test repository.

• Besides, you will have to address customer inquiries, troubleshoot issues, and provide effective solutions to our customers.

Qualification:

• You must possess the below minimum qualifications to be initially considered for this position.

• Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

• Bachelor's degree in Electrical Engineering, Science, Computer Science, Engineering, or related field of study with 2+ years of experience OR Master's degree in Electrical Engineering, Science, Computer Science, Engineering or related field of study.

Minimum Requirements:

• 3+ year experience in circuit/physical design or signoff (silicon IP/SOC/ASIC)

• 3+ year experience in scripting languages like Perl, Tcl, Python, and/or shell scripting.

Preferred Qualifications:

• In-depth knowledge of major EDA tools and flows (exp: ICC2, Innovus, PERC, CustomSimRA, Voltus/VoltusFi, Totem/RedhawkSC, etc).

• Possesses familiarity with various physical design flow domains, including synthesis, layout design, fill, DRC/LVS, parasitic extraction, and signoff. Additionally, advantageous to have experience in Custom circuit simulation (HSPICE, Spectre, or equivalent), Layout editing (Virtuoso or equivalent), Layout verification (ICV, Calibre, or equivalent), or RC Extraction (StarRC QRC or equivalent).

• Proficiency in scripting languages such as Perl, Tcl, Python, and shell scripting, including but not limited to PDK-related issue debug/fix, new solution/enhancement development, productivity/quality-increasing automation, etc.

• Experience with providing technical direction to engineering teams, including but not limited to define QA specification and Test Plan, develop regression test suite, automate QA flow, tracking progress and drive to closure.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits