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Job Area:
Engineering Group, Engineering Group > ASICS Engineering
You will develop and provide active support for complex automation flows focusing on development, QA and data analysis platforms for multiple IP’s supported by our team. The role will require active collaboration with several CAD and design teams across various sites in San Diego (CA), Austin (TX), and Bangalore (IND).
Roles and Responsibilities
In this role you will,
Design/test/deploy/maintain end-to-end EDA flows to achieve various IPs’ design goals and collaborate with design teams on methodology development
Design scripts and packages for data collection, analysis and populating online dashboards
Implement and own custom/semi-custom design flows for early stage technology evaluation
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
Preferred Qualifications
Bachelor’s degree in Science, Engineering or related field.
2+ years of professional or academic experience with architecting or supporting CAD flows.
Proficiency with programming languages like Python, Perl, TCL and Skill.
Strong programming, problem solving, documentation and communication skills.
Familiarity with ASIC frontend/backend integration flows, IP delivery collaterals including behavior model, upf lib, LEF view, etc.
Design experience with typical PnR/synthesis/STA tools etc. will be a significant plus.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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