What you’ll be doing:
In this role you will be responsible for coordinating all aspects of a GPU ASIC's bringup from planning phase to mass-production. Work will encompass diverse areas such as: allocation and logistical planning, coordinating with engineering teams for test platform/testplan definitions, initial silicon screening and production screen creation,silicon/SW/board/systemdebug, and GTM activities.
Additional responsibilities include defining new bringup processes, creation of scripts/SW to aid in bringup activities, and improving our speed of light execution through the bringup flow to get to market.
You will also work with ASIC design, packaging, VLSI, system design, DFT, test engineering, test software and chip logistics teams to support silicon bring-up.
What we need to see:
The ideal candidate should have a BSEE or equivalent experience (MSEE / MSCE preferred) and a minimum of 8 years of industry experience and 5+ years of leading either an SoC, bringup, or ASIC operations team.
You should also have detailed knowledge in the following areas:
Post-silicon activities to get to market including silicon allocation and supply management.
Silicon process technology including yield analysis and cost modeling.
Front-end design flow including micro-architecture, unit partitioning and pipelining.
State-of-the-art design verification techniques, tools and methodologies.
A key requirement of this role is that you will be expected to identify and help characterize key technical risks and engage with technical leads and managers to identify and help implement mitigation strategies.
For this role, excellent written, verbal and technical communications, as well as creative problem solving are required.
You will also be eligible for equity and .
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