What you'll be doing:
Participate in verification of multimedia IP at unit or SoC level.
Develop test plans, create testbenches, and write test cases usingSystemVerilog/C++/Python.
Apply simulation-based or formal verification methodologies to ensure design correctness.
Write and maintain verification scripts to automate test execution and regression.
Debug failures, analyze coverage, and work closely with designers to resolve issues.
Contribute to continuous improvement of verification methodologies and flow.
What we need to see:
Master’s degree in Electrical Engineering, Computer Engineering, or related field.
Strong understanding of digital design fundamentals.
Proficiency in SystemVerilog for verification.
Solidprogramming/scriptingskills (e.g., Python, C++).
Knowledge of hardware verification methodologies, especially UVM.
Exposure to formal verification tools.
Good communication skills in English, both written and spoken.
Strong problem-solving skills, self-motivated, and eager to learn.
משרות נוספות שיכולות לעניין אותך