Nvidia ASIC Design Verification Engineer - New College Grad 

China, Shanghai 

626678914

What you'll be doing:

• Study IP/system-level architect to define unitlevel testbench structure.

• IP level verification for various features defined for GPU PMU and THERM IP.

• Fullchip verification for GPU PMU IP and Tegra THERM IP.

What we need to see:

• Master School students new colleague graduate who are major in Electronic science and technology.

• Self-driving, active thinking and problem solving.

• Solid ASIC design background.

• Familiar with Verilog, perl (or python) script. Familiar with C/C++.