Power Performance Lead-client Silicon jobs at Intel
Intel Silicon Packaging Engineering Manager United States, Texas
Share
Lead and manage a team of silicon physical design engineers responsible for end-to-end silicon design engineering activities supporting technology development, and product design execution on EMIB 2.5D/3.5D, Foveros S/R/B, and Foveros Direct 3D Intel foundry advanced packaging technologies.
Oversee planning, scheduling, and execution of design projects, ensuring milestones and deadlines are met.
Drive continuous improvement in design methodologies, flows, and processes to enhance quality and efficiency.
Collaborate with cross-functional teams (technology partners, packaging, analysis, and verification) to ensure seamless integration and manufacturability.
Provide technical leadership and mentorship, fostering a culture of innovation and accountability.
Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.
Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.
Key Responsibilities:
Leadership and Management
Lead and manage a group of Silicon Packaging Engineers, providing guidance, mentorship, and support to ensure the successful execution of projects.
Oversee the planning, scheduling, and execution of package design projects, ensuring that milestones and deadlines are met.
Foster a collaborative and innovative team environment, encouraging continuous learning and professional development.
Lead design groups, coordinating efforts across multiple teams to achieve project goals.
Technical Expertise
Serve as the technical lead for the package design team cross multiple products.
Drive the development of advanced packaging designs, ensuring compliance with industry standards and best practices.
Collaborate with cross-functional teams, including package architects, silicon and board design teams, design rule owners, electrical analysis engineers, and integration teams to define and implement design specifications.
Leverage extensive experience in advanced packaging designs to meet design KPIs.
Influence.
Ensure products are designed and developed with high quality standards by overseeing design processes, risk management, and compliance throughout the product design lifecycle, working closely with cross-functional teams to identify and address potential quality issues before they arise.
Project Management
Develop and maintain detailed project plans, including resource allocation, risk management, and progress tracking.
Coordinate with stakeholders to ensure alignment on project goals, deliverables, and timelines.
Conduct regular project reviews and provide status updates to senior management.
Innovation and Improvement
Identify and implement process improvements to enhance the efficiency and quality of package designs and development.
Stay current with industry trends and emerging technologies, incorporating new methodologies and tools into the design process.
Drive innovation in product design, exploring new approaches and techniques to achieve competitive advantages.
The ideal candidate should exhibit the following behavioral traits:
Excellent leadership and team management skills, with the ability to inspire and motivate a diverse team of engineers.
Strong project management skills, with the ability to manage multiple projects simultaneously and meet deadlines.
Exceptional problem-solving and analytical skills, with a keen attention to detail.
Excellent communication and interpersonal skills, with the ability to collaborate effectively with cross-functional teams and stakeholders.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's degree in Electrical Engineeringor STEM related field with 9+years of relevant experience
-OR- Master's degree in Electrical Engineeringor STEM related fieldwith 6+ years ofrelevant experience
-OR- PhD in Electrical Engineeringor STEM related fieldwith 4+ years of relevant experience
Relevant experience should include the following:
Experience in silicon design, with at least 3 years in a leadership role.
Proven experience in a leadership or management role, with a track record of successfully leading engineering teams and delivering complex projects withinestablished timelines.
Experience with design flows and methodologies (physical design, verification).
Experience working with EDA tools from Cadence, Synopsys, and/or Siemens.
Preferred Qualifications:
Experience with advanced nodes and packaging technologies
Experience in RTL2GDS flows and methodologies
Position of Trust
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
Intel Principal Engineer - Silicon Packaging Architect United States, Texas
Share
Key Responsibilities:
- Lead the co-design of silicon and package, focusing on DDR PHY and mixed signal IP integration for server SOCs.
- Design bump maps, floor plans, and manage area constraints for PHYs, collaborating closely with packaging technical experts.
- Conduct hands-onpackage extractionsand simulations(signal integrity, power integrity)
- Finalize bump-out, floor plan, and area decisions at the end of tech readiness phases.
- Interface with packaging teams on advanced technologies (e.g., C4 bumps, micro bumps, EMIB, hybrid bonding as needed).
- Focus on design, development, and architecture, not process or materials engineering.
Required Experience:
- Experience in both silicon design (preferably mixed signal/analog) and packaging co-design.
- Background in DDR, SOC, or similar high-speed interface development.
- Hands-on expertise with bump mapping, floor planning, and packaging constraints.
- Proven ability to collaborate across silicon and packaging teams, including risk assessment and simulation.
- Familiarity with advanced packaging technologies (hybrid bonding, EMIB, etc.) is a plus but not required.
- Individual contributor or principal engineer level preferred; management experience is not required.
- Experience at leading companies in advanced packaging and PHY design (e.g., Apple, Broadcom, Qualcomm, Micron, AMD, Nvidia).
- Bachelors in electrical engineering, chemical engineering, mechanical engineering, material science or similar field (Master’s or Ph.D. preferred).
- 10+ years in silicon and packaging co-design
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:These jobs might be a good fit
Intel Sales Marketing Strategy & Operations Lead United States, Texas
Share
Key Responsibilities:
Own the completion of high-level activities directly for a member of Intel's executive team.
Provide strategic counsel to executives, assisting in business decision-making processes.
Set agendas for leadership teams and drive accountability for OKRs and team deliverables.
Coordinate group activities and cross-functional initiatives, leading or contributing to strategic projects.
Provide recommendations and consultation to department leaders to enhance teamwork across the organization.
Support and oversee special projects and initiatives to ensure alignment with company strategy.
Assist executive team members in determining and prioritizing business strategies.
Distill large volumes of business information into clear insights for communication to executives and employees.
Prepare material for strategic or operational reviews and ensure executives are prepared for meetings.
Enable teams to execute through clear goal setting, facilitating work, maintaining accountability, and driving team results.
Inspire people, role model Intel values, develop the capabilities of others, and ensure a productive work environment.
As a successful candidate, you must possess:
Strong Communication Skills: Convey complex information clearly and effectively to diverse audiences.
Leadership and Influence: Inspire and motivate teams, driving results through collaboration and accountability.
Strategic Thinking: Proactively identify opportunities and challenges, developing innovative solutions.
Adaptability: Thrive in a dynamic environment, managing diverse assignments with a solution-driven approach.
Problem-Solving Skills: Approach challenges with creativity and resourcefulness, finding effective solutions.
Interpersonal Skills: Build strong relationships across the organization, fostering teamwork and collaboration.
Attention to Detail: Ensure accuracy and precision in all aspects of work, from strategic planning to execution.
Resilience: Maintain focus and composure under pressure, navigating complex situations with confidence.
Integrity: Uphold Intel's values, demonstrating ethical behavior and accountability in all interactions.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship.
Minimum Qualifications:
4+ years of experience in technology sales, technical sales, or product management.
Preferred Qualifications:
B.S. in Computer/Electrical Engineering, ComputerScience, BusinessAdministration, Information Technology,STEMor related.
MBA
5+ years of experience in any of the following:
Client Computing technologies
PC ecosystem from design to sell-through
Experience presenting strategic roadmap, product, and technology topics in front of customers
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:These jobs might be a good fit
Intel Senior Pre-Silicon Verification Engineer United States, Texas
Share
You Are
Responsibilities may include but are not limited to:
Performs functional verification of CPU logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.
Participates in the definition of architecture and microarchitecture features of the CPU being designed actively.
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications could be obtained through a combination of schoolwork, classes, research, and/or relevant previous job and/or internship experiences.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or any related field with 4+ years of relevant experience -OR- Master's in Electrical/Computer Engineering or any related field with 3+ years of relevant experience -OR- PhD in Electrical/Computer Engineering or any related field
3+ years of experience in Scripting languages such as Python and Perl,
3+ years of experience inComputer-Architecturefamiliarity
3+ years of experience in Power Management flows including low power entry/exit, frequency change flows etc
3+ years of experience in Design Verification and Validation methodologies with UVM, System Verilog and industry standard EDA tools
Preferred Qualifications
Experience with Pre-silicon verification, SoC validation.
Proficiency with C/C++ System Verilog coding and debug
Experience with RTL development
Knowledge of system level boot flows and power management.
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:These jobs might be a good fit
Intel Senior Pre-Silicon Verification Engineer United States, Texas
Share
You Are
Responsibilities may include but are not limited to:
Performs functional verification of CPU logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.
Participates in the definition of architecture and microarchitecture features of the CPU being designed actively.
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications could be obtained through a combination of schoolwork, classes, research, and/or relevant previous job and/or internship experiences.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or any related field with 4+ years of relevant experience -OR- Master's in Electrical/Computer Engineering or any related field with 3+ years of relevant experience -OR- PhD in Electrical/Computer Engineering or any related field
3+ years of experience in Scripting languages such as Python and Perl,
3+ years of experience inComputer-Architecturefamiliarity
3+ years of experience in Power Management flows including low power entry/exit, frequency change flows etc
3+ years of experience in Design Verification and Validation methodologies with UVM, System Verilog and industry standard EDA tools
Preferred Qualifications
Experience with Pre-silicon verification, SoC validation.
Proficiency with C/C++ System Verilog coding and debug
Experience with RTL development
Knowledge of system level boot flows and power management.
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:These jobs might be a good fit
Intel Client SoC Architect United States, Texas
Share
Your responsibilities may include but not be limited to:
Define SoC fabrics, SoC hardware/software interface, and IP integration.
Author high-level architecture specifications that meet product/market requirements and facilitate correct implementation by development teams
Interact with Micro Architects, IP Architects, discrete GFX team, RTL Design teams, Verification teams, Emulation team, Power and Performance validation teams to understand the product requirements and define overall Display strategy to ensure the end product meets the PnP goals at pre-silicon estimation and post-silicon measurement.
Interact withapplication/driver/firmware
The SOC Architect should possess the following attributes:
Excellent written and verbal communication skills.
Willingness to work effectively in a collaborative, cross-functional environment.
Excellent problem-solving and debugging skills.
Willingness to lead task forces to resolve problems.
Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering with:
BS degree with 8+ years of industry experience
OR- Master's degree with 6+ years of industry experience
OR- PhD degree with 4+ years of industry experience
Candidate must have combined 4+ years of experience in the following areas:
System-on-Chip (SoC) integration,
SoC architecture,
SoC design,
System architecture ( such as Hardware / Software interface, PNP )
Preferred Qualifications:
IP integration and SoC flows with IP's such as Graphics, Media, or Image Processing.
Broad knowledge of computer systems (software, hardware, firmware, silicon).
Experience with hardware/software interfaces.
Power and Performance.
Experience with at least one of the following: Memory controllers, cache hierarchy, fabrics, high speed I/O protocols.
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
Intel SOC Performance Architect United States, Texas
Share
The Datacenter Power and Performance Architecture group architects products that deliver leadership performance, performance efficiency and security for traditional as well as new paradigms for data centric computing in the datacenter and edge with the right balance of leadership technologies and IPs for computing, interconnect, memory and quality delivered through the best mix of silicon, packaging and platform solutions.
You Are
As a SOC Performance Architect responsibilities will include but are not limited to:
You will work in a dynamic team environment hand in hand with our design, validation, and architecture teams to deliver best-in-class performance and innovations across the XEON CPU and AI portfolio.
Determining, specifying and evaluating the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly. Designs framework for particular functions.
Defines, documents and tests processes for inclusion into technical platforms, subsystem specifications, input/output and working parameters for hardware and/or software compatibility.
Identifies, analyzes and resolves subsystem and/or SoC design weaknesses.
Influences the shaping of future products by significantly contributing to the architecture used across design families.
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Bachelor's Degree in Electrical/Computer Engineering or Computer Science with 1+ years of experience -OR- Master's Degree in Electrical/Computer Engineering or Computer Science -OR- PhD in Electrical/Computer Engineering or Computer Science.
Preferred qualifications
Experience in in Computer architecture.
Experience in C, C++ or Python.
Experience in Verilog, System/Verilog.
Experience in CPU architecture, performance and power architecture, modelling, pre and post silicon analysis.
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:These jobs might be a good fit
Share
Lead and manage a team of silicon physical design engineers responsible for end-to-end silicon design engineering activities supporting technology development, and product design execution on EMIB 2.5D/3.5D, Foveros S/R/B, and Foveros Direct 3D Intel foundry advanced packaging technologies.
Oversee planning, scheduling, and execution of design projects, ensuring milestones and deadlines are met.
Drive continuous improvement in design methodologies, flows, and processes to enhance quality and efficiency.
Collaborate with cross-functional teams (technology partners, packaging, analysis, and verification) to ensure seamless integration and manufacturability.
Provide technical leadership and mentorship, fostering a culture of innovation and accountability.
Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.
Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.
Key Responsibilities:
Leadership and Management
Lead and manage a group of Silicon Packaging Engineers, providing guidance, mentorship, and support to ensure the successful execution of projects.
Oversee the planning, scheduling, and execution of package design projects, ensuring that milestones and deadlines are met.
Foster a collaborative and innovative team environment, encouraging continuous learning and professional development.
Lead design groups, coordinating efforts across multiple teams to achieve project goals.
Technical Expertise
Serve as the technical lead for the package design team cross multiple products.
Drive the development of advanced packaging designs, ensuring compliance with industry standards and best practices.
Collaborate with cross-functional teams, including package architects, silicon and board design teams, design rule owners, electrical analysis engineers, and integration teams to define and implement design specifications.
Leverage extensive experience in advanced packaging designs to meet design KPIs.
Influence.
Ensure products are designed and developed with high quality standards by overseeing design processes, risk management, and compliance throughout the product design lifecycle, working closely with cross-functional teams to identify and address potential quality issues before they arise.
Project Management
Develop and maintain detailed project plans, including resource allocation, risk management, and progress tracking.
Coordinate with stakeholders to ensure alignment on project goals, deliverables, and timelines.
Conduct regular project reviews and provide status updates to senior management.
Innovation and Improvement
Identify and implement process improvements to enhance the efficiency and quality of package designs and development.
Stay current with industry trends and emerging technologies, incorporating new methodologies and tools into the design process.
Drive innovation in product design, exploring new approaches and techniques to achieve competitive advantages.
The ideal candidate should exhibit the following behavioral traits:
Excellent leadership and team management skills, with the ability to inspire and motivate a diverse team of engineers.
Strong project management skills, with the ability to manage multiple projects simultaneously and meet deadlines.
Exceptional problem-solving and analytical skills, with a keen attention to detail.
Excellent communication and interpersonal skills, with the ability to collaborate effectively with cross-functional teams and stakeholders.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's degree in Electrical Engineeringor STEM related field with 9+years of relevant experience
-OR- Master's degree in Electrical Engineeringor STEM related fieldwith 6+ years ofrelevant experience
-OR- PhD in Electrical Engineeringor STEM related fieldwith 4+ years of relevant experience
Relevant experience should include the following:
Experience in silicon design, with at least 3 years in a leadership role.
Proven experience in a leadership or management role, with a track record of successfully leading engineering teams and delivering complex projects withinestablished timelines.
Experience with design flows and methodologies (physical design, verification).
Experience working with EDA tools from Cadence, Synopsys, and/or Siemens.
Preferred Qualifications:
Experience with advanced nodes and packaging technologies
Experience in RTL2GDS flows and methodologies
Position of Trust
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
