Applications Engineering Manager Physical Design/testchip jobs at Intel

Job Description:

• Lead and manage a team of silicon physical design engineers responsible for end-to-end silicon design engineering activities supporting technology development, and product design execution on EMIB 2.5D/3.5D, Foveros S/R/B, and Foveros Direct 3D Intel foundry advanced packaging technologies.

• Oversee planning, scheduling, and execution of design projects, ensuring milestones and deadlines are met.

• Drive continuous improvement in design methodologies, flows, and processes to enhance quality and efficiency.

• Collaborate with cross-functional teams (technology partners, packaging, analysis, and verification) to ensure seamless integration and manufacturability.

• Provide technical leadership and mentorship, fostering a culture of innovation and accountability.

• Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.

• Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.

Key Responsibilities:

Leadership and Management

• Lead and manage a group of Silicon Packaging Engineers, providing guidance, mentorship, and support to ensure the successful execution of projects.

• Oversee the planning, scheduling, and execution of package design projects, ensuring that milestones and deadlines are met.

• Foster a collaborative and innovative team environment, encouraging continuous learning and professional development.

• Lead design groups, coordinating efforts across multiple teams to achieve project goals.

Technical Expertise

• Serve as the technical lead for the package design team cross multiple products.

• Drive the development of advanced packaging designs, ensuring compliance with industry standards and best practices.

• Collaborate with cross-functional teams, including package architects, silicon and board design teams, design rule owners, electrical analysis engineers, and integration teams to define and implement design specifications.

• Leverage extensive experience in advanced packaging designs to meet design KPIs.

• Influence.

• Ensure products are designed and developed with high quality standards by overseeing design processes, risk management, and compliance throughout the product design lifecycle, working closely with cross-functional teams to identify and address potential quality issues before they arise.

Project Management

• Develop and maintain detailed project plans, including resource allocation, risk management, and progress tracking.

• Coordinate with stakeholders to ensure alignment on project goals, deliverables, and timelines.

• Conduct regular project reviews and provide status updates to senior management.

Innovation and Improvement

• Identify and implement process improvements to enhance the efficiency and quality of package designs and development.

• Stay current with industry trends and emerging technologies, incorporating new methodologies and tools into the design process.

• Drive innovation in product design, exploring new approaches and techniques to achieve competitive advantages.

The ideal candidate should exhibit the following behavioral traits:

• Excellent leadership and team management skills, with the ability to inspire and motivate a diverse team of engineers.

• Strong project management skills, with the ability to manage multiple projects simultaneously and meet deadlines.

• Exceptional problem-solving and analytical skills, with a keen attention to detail.

• Excellent communication and interpersonal skills, with the ability to collaborate effectively with cross-functional teams and stakeholders.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineeringor STEM related field with 9+years of relevant experience

• -OR- Master's degree in Electrical Engineeringor STEM related fieldwith 6+ years ofrelevant experience

• -OR- PhD in Electrical Engineeringor STEM related fieldwith 4+ years of relevant experience

Relevant experience should include the following:

• Experience in silicon design, with at least 3 years in a leadership role.

• Proven experience in a leadership or management role, with a track record of successfully leading engineering teams and delivering complex projects withinestablished timelines.

• Experience with design flows and methodologies (physical design, verification).

• Experience working with EDA tools from Cadence, Synopsys, and/or Siemens.

Preferred Qualifications:

• Experience with advanced nodes and packaging technologies

• Experience in RTL2GDS flows and methodologies

Experienced HireShift 1 (United States of America)US, Arizona, PhoenixUS, Oregon, Hillsboro
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Responsibilities for this position include, but are not limited to:

• Appliesengineering/technical

• Applies advanced engineering knowledge of Intel and industry technology roadmaps, and technical knowledge of commodities to drive supply chain solutions ahead of Intel's needs.

• Develops supply chain solutions that are tailored to unique Intel development needs for complex situations and products.

• Leverages strong understanding of technology, contracting, negotiating, risk mitigation and supplier relationship management to manage supplier relationships, and provide sustainable cost, quality, availability, and technology solutions with adherence to procurement policies.

• Coordinates purchasing activities with cross-functional teams to acquire materials and services in a cost effective and timely manner.

• Ensures respective commodities meet technical specifications and cost requirements for Intel to develop products/services.

• Works closely with engineering teams and suppliers to define standard and custom product requirements, influences technical design decisions, negotiates technical contract terms with suppliers to meet technical specifications and fulfil business objectives.

• Conducts periodic reviews of commodity sourcing strategies in partnership with engineering teams/customers to shape strategic business objectives and account investments through aligned roadmaps.

• Reviews and pivots sourcing strategies in response to changing market conditions and develops mitigation plans to ensure business continuity.

• Works closely with finance and legal to resolve disputes with suppliers/internal partners.

• Leads sustainability and regularly compliance and ensures suppliers comply with Intel business processes.

• Understands Intel's technical roadmap and positions the supply chain to meet Intel's needs including alignment tosafety/availability/quality/sustainabilityframework.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor’s degree in Engineering, Material Science, Supply Chain Management, or related field with 8+ years relevant experience

— or —

Master’s degree in the same fields with 6+ years of relevant experience

— or —

PhD in the same fields with 4+ years relevant experience

Relevant work experience should be of the following:

• Experience with Supply line and Capacity Management Planning

• Experience with Semiconductor substrate manufacturing, supplier capability analysis and capacity expansion requirements

• Experience with overall semiconductor packaging and advanced packaging requirements

Preferred Qualifications:

• Engineering experience in manufacturing and/or supplier management

• Experience in program management and setting technical recommendations and requirements

Experienced HireShift 1 (United States of America)US, Arizona, PhoenixUS, California, Santa Clara, US, Oregon, Hillsboro
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Job Description:

The job Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high quality integration of the GPU block.

As ayour responsibilities will include but are not limited to:

• You will be responsible for designing and/or integrating IP for a discrete graphics SoC. You will be working or assisting in architecture, design, implementation, formal verification, emulation and validation of discrete graphics SoC products, including:

• Creating a design to produce key assets that help improve product KPIs for discrete graphics products.

• Working with SoC Architecture and platform architecture teams to establish silicon requirements.

• Making appropriate design trade off balancing risk, area, power, performance, validation complexity and schedule.

• Creating micro architectural specification document for the design.

• Working with external vendors on tools or IPs required for the development of micro-architecture, design and design qualification of custom silicon designs.

• Driving vendor's methodology to meet world class silicon design standards.

• Architecting area and power efficient low latency designs with scalabilities and flexibilities.

• Power and Area efficient RTL logic design and DV support.

• Running tools to ensure lint-free and CDC/RDC clean design, VCLP.

• Synthesis and timing constraints.

The ideal candidate will exhibit the following behavioral traits:

• Ability to drive and improve digital design methodology to achieve high quality first silicon

• Able to work with multi-functional teams within Intel and external vendors across geographical boundaries to resolve architectural and implementation challenges with a focus on schedule

• Strong verbal and written communication skills

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimumqualifications:

• Bachelors degree in Electrical, Computer Engineering with 4+ Years relevant experience in the semiconductor industry.

• OR Masters degree in Elecrtical, Computer Engineering with 3+ years relevant experience in the semiconductor industry

• 4+ years of experience in/with:

  • Verilog and system verilog, synthesizeable RTL

  • Modern design techniques and energy-efficient/low power logic design and power analysis

  • Computer Architecture

Preferred qualifications:

• Experience with FPGA emulation, silicon bring-up, characterization and debug

• Experience in multiple tape-outs reaching production with first pass silicon

Experienced HireShift 1 (United States of America)US, California, FolsomUS, California, Santa Clara

Benefits:

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Microcode Development

• Design and implement microcode for complex instruction sets (x86 or proprietary architectures).
• Analyzing existing developed code, understanding and gathering new requirements, developing new algorithms or changes required, documenting for review and communication, creating and negotiating a development plan, writing the code, and debugging that code for functionality and performance requirements.
• Interacting and communicating with Architecture, Logic design, and Validation teams to achieve their coding goals.
• Supporting this code through tape-in and future steppings, either through patching or code rewrites.
• Being a member of the Microcode team, candidate will also be reviewing others' code and helping to improve group productivity and accuracy.

Architecture & Design

• Defining and developing innovative Architecture and Microarchitecture for Intel's next generation E-core Microprocessor.
• Collaborate with CPU architects to understand instruction set requirements and performance targets.
• Analyze instruction execution flows and optimize microcode for performance, power, and area efficiency.
• Design microcode control structures and sequencing logic.
• Participate in microarchitecture definition and specification reviews.

Verification & Testing

• Develop comprehensive test plans and verification strategies for microcode functionality.
• Create and execute microcode test cases using simulation environments.
• Debug microcode issues using advanced debugging tools and methodologies.
• Collaborate with validation teams to ensure proper microcode coverage in silicon testing.

Optimization & Performance

• Profile and analyze microcode performance using performance monitoring tools.
• Identify and resolve performance bottlenecks in instruction execution paths.
• Optimize microcode for specific workloads and benchmark requirements.
• Implement power management features within microcode constraints.

Qualifications:

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying topcandidates.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering or in a STEM related field of study.
• 5+ years of experience in CPU microcode development or processor design.
• 2+ years' experience with firmware development in C or C++.
• 1+ years' experience or education in Computer Architecture and/or Micro Architecture techniques.
• 1+ years' experience with logic design using Verilog and debug using industry standard tools.

Preferred Qualifications

• Post Graduate degree in Computer Science, Electrical Engineering, Computer Engineering or in a STEM related field of study.
• Experience simulator development using C++.
• Experience in logic design using Verilog and debug using industry standard tools.
• Experience with CPUarchitecture/assembly(i.e. Intel x86, AMD, ARM Cortex, etc.).

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Job Description:

• Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.

• Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.

• Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.

• Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.

• Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.

• Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelors degree in Computer Engineering, Electrical Engineering or STEM related field with 3+ years of relevant work experience

• -OR- Masters degree in Computer Engineering, Electrical Engineering or STEM related field with 2+ years of relevant work experience

• -OR- PhD degree in Computer Engineering, Electrical Engineering or STEM related field

Relevant experience should include the following:

• Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure

• PV convergence (including static timing and power analysis)

• Chip physical design verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise and electro-migration checks.

• Scripting in an interpreted language, minimum TCL in addition to at least one other (e.g. Perl, Python, Ruby)

• Demonstrated success in one or more of the following areas: Synthesis of a digital logic block, which was integrated into a large SoC or IP

Preferred Qualifications:

• 2+ years of industry experience/exposure with CPU Micro-Architecture

• Experience with Physical design best known practices concerning floor-planning, routing techniques, clock distribution

• Experience with of Static Timing Analysis, Noise analysis, and reliability verification techniques

• Experience with of RTL to GDS methodologies and formal equivalence

• Experience with Synopsys tool suite (Fusion compiler, ICC2, PrimeTime) or Cadence (genus/innovus)

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

Experienced HireShift 1 (United States of America)US, Oregon, Hillsboro
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

Note: This role requires regular onsite presence to fulfill essential job responsibilities. Performs feasibility studies and provides integrated process solutions to meet desired safety, quality, reliability and output requirements for ultimate transfer to high volume manufacturing. Selects and develops material and equipment for the process to meet quality, reliability, cost, yield, productivity and manufacturability requirements. Plans and conducts experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product. Identifies integrated process solutions to resolve issues or specific requests from customers by partnering with innovators in product engineering and module engineering teams. Conducts new product qualification and technology transfers from fabrication operations. Leverages big data analysis to identify process design weaknesses and/or manufacturing tool issues and proposes corrective, data-based solutions. Collaborates and engages with development and material suppliers, and partners to develop processes and equipment needs to meet technology roadmaps. As a principal engineer, recognized as a domain expert who influences and drives technical direction across Intel and industry. Develops and mentors other technical leaders, grows the community, acts as a change agent, and role models Intel values. Aligns organizational goals with technical vision, formulates technical strategy to deliver leadership solutions, and demonstrates a track record of relentless execution in bringing products and technologies to market.

Qualifications:

Bachelor's degree inElectrical/ElectronicEngineering, &/or Computer Engineering, or Science, or other STEM-related degree and 7 years of progressively related experience.

Alternatively, Master's degree inElectrical/ElectronicEngineering, &/or Computer Engineering, or Science, or other STEM-related degree and 5 years of progressively related experience.

Shift 1 (United States of America)US, Arizona, Phoenix
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Job Description:

development engineers to drive technology development and enablementacross the full range of patterning modules for advanced CMOS technologies

be responsible fordevelopment and drivingmanufacturability across key lithography tools includingbut not limited to DUV

Primary responsibilities willat the intersection of technology developmenthigh volumeespecially on new lithography processesthat require engineering to meet high volume requirements.

This includes driving safety,quality, performance, throughput, capability (patternand cost.

high volumeand will be

and develop the engineer

The leader will be asubject matter expert and have experience working with Integration and othermodules leaders such as etch and thin films to deliver modular solutionsthat meet the technology targets.

Qualifications:

Minimum qualifications areto be initially considered for this position. Preferred qualifications are in addition to therequirements and are considered a plus factor inMinimum Qualifications:
14 years of relevant work experience in the semiconductor spacewith a strong focus on lithography
Degree in Electrical Engineering or Technical Equivalent
Prior senior management with large, multi-national manufacturing employers, preferably in hightechnology/scientific/semiconductorsectors with prior specialization in technology development.
Strong history of industry experience in process development, leadership, and semiconductor
Background working with a combination of investors and third- party suppliers on solutionoptimization/customizationto meet their manufacturing needsespecially with the industry leaders in lithography solutionssuch as ASML and KT.
Engineering group leader background at global scale including leading significant factory ramp-up and process technology development in high volume manufacturing environments.
Extensive experience instart-up with technicaltrack recordin multiple areas of semi-conductor sector in areas such as manufacturing engineering, quality and reliability, research and development, sourcing/supply chain innovations etc.Preferred Qualifications
Substantial technical background inlithography as used in advanced CMOS technologieswith a body of research and patents.Demonstrated history of delivering customized solutions in Research and Development and HVM organizations.related work experience in a semiconductor foundry preferredRequirements listed would be obtained through a combination of industry relevant job experience, internship

Experienced HireShift 1 (United States of America)US, Arizona, PhoenixUS, Oregon, Hillsboro
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.