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Intel Silicon Packaging Design Engineer 
United States, Arizona, Phoenix 
356368496

Today
Job Description:

Silicon Packaging Design Engineer job responsibilities include but not limited to:

  • Drives end-to-end development for substrate design from concept through tapeout and implements physical layout and routing of the package design.
  • Follows substrate design rules, conducts routing studies to establish design, performance, and cost tradeoffs.
  • Works closely with silicon and hardware teams to optimizesilicon/package/boardperformance and pinout.
  • Defines substrate design rules, conducts internal and external reviews, and resolves DRCs to optimize package design.
  • Completes documentation and collateral into the system of record tool.
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

  • US Citizenship required.
  • Ability to obtain a US Government Security Clearance.
  • Bachelor's degree in Electrical / Mechanical Engineering, or in a STEM related field of study.
  • 3+ months experience with microelectronic package or PCB physical layout design using package design tools such as Siemens Xpedition, Cadence Allegro, or CAD.

Preferred Qualifications:

  • Active US Government Security Clearance with a minimal of a Secret Level.
  • Master's degree in in Electrical / Mechanical Engineering, or in a STEM related field of study.
  • Performing package I/O routing starting day one.
  • Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions.
  • Microelectronic package substrate technology development.
  • Package design tools such as Package Layout Automation (PLA) and FIELD.
  • Microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
  • Extract signal integrity and/or power delivery electrical models and run AC/DC/Frequency Domain simulations.
  • Scripting using Python, VB, C, and or other languages.
College GradShift 1 (United States of America)US, Arizona, Phoenix
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.