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Google ASIC Physical Design Engineer United States, California, Sunnyvale 78843085
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience in ASIC physical design and methodologies in advanced process nodes.
- Experience with place and route EDA CAD tools, commands, debug, and custom techniques via Tcl or GUI interaction.
- Experience with EMIR parameters, analysis, violation mitigation and tradeoffs related to power grid design and augmentation.
- Experience in advanced process nodes with base and metal layer DRC analyses and problem resolution.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with IO pads, RDL route, bump mapping, and boundary scan.
- Experience with physical IP integration (e.g. memories, IO's, analog PHYs).
- Experience with silicon interposer design.
- Experience crafting physical design automation flows.
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