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Apple Graphics FE Implementation Engineer United States, California 224911721
18.11.2024
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Minimum Qualifications
- Experience with physical synthesis, including logic and PPA optimization techniques
- Experience with Verilog, System Verilog or other scripting languages
- Experience using logic equivalence tools for RTL and Gate-level designs
- BS + 3 years of relevant experience
Preferred Qualifications
- Understanding and application of physical design (PD) and static timing analysis (STA) principles
- Ability to analyze critical paths and guide RTL designs to optimal solutions
- Collaborate effectively with IP teams spanning multiple sites
- Familiarity with DFT insertion
- Familiarity with reset domain, multi-clock domain, multi-power domain (UPF), linting tools and concepts across RTL and Gate-Level
- Experience implementing ECOs for functionality and timing
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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