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Apple Graphics FE Implementation Engineer United States, California 340545196
06.05.2025
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- Relevant Coursework in Computer Architecture, Digital Logic Design and CMOS VLSI design
- Experience with at least one scripting language (python/perl/tcl)
- BS required
- Familiarity with Verilog and System Verilog
- Exposure to industry standard rtl2gds tools for synthesis, place and route, static timing analysis
- Exposure to Clock/Reset domain crossing or Voltage crossing principles
- Familiarity with DFT methodologies
- Knowledge of static timing analysis concepts (setup and hold timing)
- Understanding of CMOS device characteristics for area/timing/power tradeoffs
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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