Job Description:- Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs.
- Participates in the definition of architecture and microarchitecture features of the block being designed.
- Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
- Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
- Supports SoC customers to ensure high quality integration of the GPU block.
Qualifications:- Bachelor's degree Electrical Engineering, Computer Engineering, Computer Science, or related field with 5+ years of industry experience OR Master's degree in same field with 3+ years of industry experience.
- Your experience should be in the following areas: Hardware Architecture definition, RTL design, logic design or timing convergence.
- Verilog/ System Verilog,Programming/scriptinglanguages like Python or Perl.
- UVM knowledge is good to have.
- Preferred skills and experience: Experience with ASIC design flow, timing constraints, UVM verification. Knowledge of architecture specification writing and usage.
- Experience in power and performance optimization of logic design components.
- Preferred Qualifications: Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
Experienced HireShift 1 (India)India, Bangalore
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.