The NVIDIA SOC group is looking for ASICdesign/verification/infrastructuresand methodologies interns. In this position, you will take part in all stages to design modern complex GPU/Tegra chips with state-of-art feature and flows, you will work directly with different global teams, as Arch/SW, ASIC Design/Verification, SOCD/Clocks/SysASIC, DFT and Physical Design teams. Additionally, you will be involved in defining and creating infrastructures and methodologies that create more efficient and flexible SOCs in future.
Participate in chip top integration and assembly
Engage in design/verification work of system-level units
Optimizecomposing/verificationflow, processes, and methodologies
Develop new tools and flows to improve efficiency and quality
Pursuing a BS/MS degree from EE/CS or related majors from a prestigious university.
Familiarity with verification methodology, tools, and flow
Understanding of front-end ASIC design flow, including RTL design, synthesis, and timing analysis
Outstanding analytical and problem-solving skills
Proficiency inPython/Perl/JavaScriptis a plus
Proficient in English (both written and spoken) and excellent communication skills
Strong teamwork spirit and the ability to collaborate easily with team members
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