Cisco TOP Implementation Engineer 

Armenia, Yerevan 

972115777

• Perform full-chip Physical Design; Die-size estimation and coordination across multiple teams; floor-planning and routing.
• Perform full-chip DRC, LVS and ANT; review and debug issues; provide solutions; and ensure signoff clean results.
• Provide all necessary inputs to block owners, e.g. block shapes, pin location, IP location, etc.
• Collaborate with block level PD teams to understand each block’s behavior and implementation challenges.
• Work closely with packaging team to implement chip bump map.
• Work closely with vendors providing IPs, to make sure IPs are implemented correctly physically.

• 5+ years of experience in Top-level physical design, including debugging and providing solutions.
• Experience in deep submicron CMOS technologies relevant to process.
• Solid understanding and experience in CMOS Digital Design Flow.
• Bachelor's or Master's degree in Electrical Engineering or Computer Science or any other relevant field.
• Excellent verbal and written communication skills in English.

• Experience in physical verification (DRC, LVS) and EM/IR.
• Understanding of the full physical design cycle from RTL to GDSII.
• Hands-on experience in ASIC implementation and verification.
• Knowledge of scripting languages (Python, Tcl, Shell).

But “Digital Transformation” is an empty buzz phrase without a culture that allows for innovation, creativity, and yes, even failure (if you learn from it.)