The point where experts and best companies meet
Share
What you'll be doing:
Develop Clock RTL generation and distribution tools for the next generation NVIDIA projects.
Collaborate with the Clocks, unit, post-silicon and backend teams to understand the current concerns with Clocking and come up with solutions for supporting high speed Clocking.
Understand the physical aspects of the chip and develop better clock distribution techniques.
Improve Power, Performance, and Area (PPA) of state-of-the-art NVIDIA GPUs and Mobile SOCs.
Contribute to new design implementation flows.
What we need to see:
BS or MS (preferred) degree or equivalent experience in CE or EE
At least 3+ years of work experience.
Validated strong coding skills in C++ or other industry-standard scripting languages.
Deep understanding of logic optimization techniques and PPA trade-offs.
Excellent problem solving and debugging skills.
Strong interpersonal and collaboration skills are required.
Ways to stand out from the crowd:
Prior experience in RTL design (Verilog), verification and synthesis.
Proficiency in C++, Perl, Python, Make scripting.
You will also be eligible for equity and .
These jobs might be a good fit