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Intel Logic Design Methodology Engineer United States, Texas 890780881
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Job Responsibilities:
- Lead customer-facing initiatives across Frontend (FE) domains such as RTL and Design Verification (DV), engaging directly with customers to organize and execute strategies from proof of concept to successful deployment of frontend CAD tools, flows and methodologies.
- Gather and implement customer feedback, manage TFM documentation, conduct system-level testing, drive methodology improvements, and support customers to ensure productive use of TFMs.
- Oversee a multi-site initiative, collaborating with key customers, including server, clients and IP design teams across the United States, to enable the deployment, validation, and release of high-quality design systems.
- Maintain constant communication with customers, proactively identify potential issues, and drive appropriate solutions.
- Serve as a liaison between customers, development teams, and vendors, integrating state-of-the-art design solutions (EDA tools, flows, and methodologies) sourced externally or developed internally to build sustainable and scalable solutions for multiple chip design projects.
- Collaborate with design automation technical leads, design domain leads, domain managers, and EDA Vendors to orchestrate the development of new design automation methodologies and tool capabilities from concept to full production, enhancing design quality, reducing cycle time, and optimizing designs for new projects.
- Partner with design system development engineering and design infrastructure engineering teams to enable the deployment validation and release of high-quality design systems.
The ideal candidate should exhibit the following behavioral traits:
- Working with a large and globally spread teams and building consensus.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Minimum Qualifications:
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering, Computer Science, or related major with 10+ years' experience -OR- a Master's Degree in Electrical/Computer Engineering, Computer Science, or related major with 8+ years' experience with:
- Deploying, supporting, or developing and managing frontend CAD tools such as simulation, emulation, static checks, connectivity, handoff to backend etc.
- Managing development, development or supporting Frontend CAD tools and flows
- System Verilog HDL compilers parsers simulators linters profiling and debugging tools.
- Programming in scripting languages Perl or TCL
- Direct hands-on experience in one or more of the following areas: EDA/CAD vendor tools (Cadence: Xcelium, Palladium, vManager, Indago etc. , Synopsys:VCS, Zebu, Spyglass, VC Spyglass, VMS, Verdi etc.) experience
- Preferred Qualifications:
Background of EDA tools, flow and methodology.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
Position of Trust
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
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