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Apple Design Verification Engineer United States, Texas, Austin 843270075
13.06.2024
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Description
APPLE INC has the following available in West Lake Hills, Texas. Create software to verify architecture and functionality of pre-silicon hardware designs. Review specifications, develop attributes, tests, and coverage plans. Define design verification methodology and test benches. Work with design and micro architecture teams to understand performance and functional goals of the design. Conduct test plan reviews, develop block/full chip tests, and triage failures. Run regressions, perform bug tracking, and analyze code and functional coverage. Maintain deliverables to align with project goals and support cross functional engineering. Program in object-oriented programming, C, C++, System Verilog, Python, and Perl. Test and script using Shell, Makefile, Python, or Perl. Simulate and debug Register Transfer Level (RTL). Debug Verilog code. Develop testbench using System Verilog and UVM. Understand logic design and computer architecture. Use constrained random verification process, functional coverage, code coverage, and assertion. 40 hours/week.
Minimum Qualifications
- Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science or related field.
- Experience and/or education must include:
- Computer Architecture
- ASIC Design
- System Verilog
- UVM
- Design Verification Environment Development
- Simulator
- ASIC Verification
Preferred Qualifications
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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