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Apple SoC Physical Design Engineer PnR Russia, Leningrad Oblast, Vyborg 802804103
06.06.2024
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Description
• Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.• Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.• Timing, physical and electrical verification, and driving the signoff closure for the partitions.• Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.• Drive optimization of PnR partitions, to achieve best Power/Performance/Area.
Key Qualifications
- Minimum BS and 3+ years of relevant industry experience.
- Recent successful tapeouts in deep submicron technology.
- Knowledgeable in partition level P&R implementation including floorplanning, clock & power distribution, timing closure, and physical & electrical verification.
- Strong knowledge of PD construction & analysis flows and methodology.
- Shown ability to execute to stringent schedule & die size requirements.
- Strong interpersonal skills.
- Experienced in industry standard tools and understanding their capabilities and underlying algorithms.
Education & Experience
Minimum BS and 3+ years of relevant industry experience.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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