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Apple SoC Physical Design Engineer PnR United States, Oregon, Beaverton 777718481
06.03.2025
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Minimum Qualifications
- Minimum BS and 3+ years of relevant industry experience.
Preferred Qualifications
- Experience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification.
- Experience with physical design construction and analysis flows and methodology.
- Ability to adhere to stringent schedule and die size requirements.
- Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.
- Experience with sub 10nm tech nodes.
- Experience with industry standard tools, understanding their capabilities and underlying algorithms.
- Strong communication skills.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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