Marvell Principal Engineer Design Verification 

Taiwan, Hsinchu 

797101603

As a key CAD member of Marvell Central Engineering, you will play a leading role on developing next-generation automated design flow and its add-on tools. You will have the opportunity to use your extensive design and CAD knowledge to participate in defining the whole organization's design infrastructure, methodology and workflows.

What You Can Expect

•

• Design, implement, and maintain large-scale HPC clusters for EDA workloads, ensuring high availability, fault tolerance, and efficient resource utilization.
• Manage, configure, and optimize LSF job scheduling systems to support diverse verification workflows.
• Develop, automate, and monitor deployment, configuration, and operational processes for EDAinfrastructure.
• Collaborate with EDA engineers and designers to refine verification flows to run optimally on the grid.
• Implement and advance CI/CD pipelines to streamline the deployment, testing, and monitoring of infrastructure and EDA flows.
• Provide troubleshooting and support for users and the infrastructure.
• Monitor infrastructure health, performance, and usage; proactively identify, resolve, and document issues.
• Ensure compliance with security bestpractices, licensemanagement, and data protection requirements.
• Contribute to architectural innovation and process improvement for future scalability and efficiency.
• Participate in incident management teams for prompt issue resolution.

What We're Looking For

• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field.

Proficiency with Programming or scripting in languages such as Python, Bash, or Perl for automation and workflow development.

• Working knowledge of Linux system administration and cluster troubleshooting.

Familiarity withinfrastructure-as-code,configuration management, and monitoring , DevOps; SRE concepts; CI/CD and GitOps.

• Strong communication and collaboration skills; ability to work in cross-functional teams.
• Track record of identifying and implementing infrastructure optimizations for efficiency, throughput, and reliability.

Preferred Qualifications:

• Experience with cloud-based EDA infrastructure or hybrid HPC environments.
• Familiarity with regression management tools, and workflow automation specific to silicon verification.
• Experience with HPC cluster management, especially using LSF/Platform LSF, in a chip verification or EDA context.

Key Attributes:

• Analytical, detail-oriented, and proactive in identifying and solving technical problems.
• Passion for continuous learning and embracing new technologies and methods.
• Strong organizational abilities and commitment to documentation and process improvement.