BS and a minimum of 10 years relevant industry experience.
The ideal candidate should have 10+ years of process integration experience working in an IDM or a Foundry process.
Experience in integration modules such as Fin and STI formation, Spacer, Silicide, Stress Engineering, High-K Metal Gate, Lithography, Etch, CMP technologies
Experience with advanced process technology preferably Fin-FET and GAA CMOS.
Sound understanding of MOSFET device physics and scaling impact
Experience with process design rules and process assumptions
Experience in yield management of high volume manufacturing
Deep understanding of wafer sort testing and analysis methods for typical Application Processor and System On Chip
Solid understanding of failure analysis techniques for root-causing process and device issues
Excellent interpersonal skills to work with internal teams and external suppliers
Domestic and international travel is required
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.