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Google Senior Signal Power Integrity Engineer Silicon United States, California, Mountain View 764739325
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
- 8 years of experience with signal and power integrity modeling and simulation for high-speed interfaces (e.g., LPDDR, MIPI, UFS, PCIe, USB).
- Experience with electromagnetic theory, transmission line concepts, and circuit design.
- Experience with EM simulation tools (e.g., HFSS, SiWave, PowerSI, Clarity) and circuit simulation tools (e.g., Hspice, Spectre, ADS).
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
- 8 years of experience in the signal and power integrity field.
- Experience in Power Delivery Network (PDN) modeling, simulation, and correlation, including PMIC design concepts.
- Experience in Power Delivery Network (PDN) modeling, simulation, and correlation, including PMIC design concepts.
- Experience with lab equipment for validation and debugging (e.g., high-speed oscilloscope, TDR, VNA).
- Experience with on-chip power analysis flows (e.g., PTPX, Redhawk, Voltus).
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