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Google Multimedia Design Verification Engineer Silicon 
Taiwan, New Taipei 
749604576

30.04.2024

Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • Experience with verification methodologies and languages such as UVM or SystemVerilog.
  • Experience in verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience creating and using verification components and environments in a standard verification methodology such as UVM.
  • Experience with performance verification of ASICs and ASIC components and experience with ASIC standard interfaces and memory system architecture.
  • Experience with image processing or other multimedia IPs such as Display or Video Codec.
  • Experience with verification techniques, System Verilog Assertions (SVA), and assertion-based verification.
  • Experience with GLS, low-power DV, and support of SOC DV.