Nvidia Design Verification Engineer - PCIE 

Taiwan, Taipei 

672554635

What you’ll be doing:

• Verification of the ASIC design, architecture, and micro-architecture of PCIE controllersfor multiple product generations for GPUs, SOCs & DPUsat IP/sub-system levels using standard verification methodologies such as UVM and Specman/e.

• Develop UVM or Specman/e based testbench components reusable across verification methodologies and integrate those across verification environments.

• Build or improve reusable testbench components including constraints, stimulus, monitors, checkers and scoreboards following coverage based verification methodology.

• Understand complex testbench and its verification scope with respect to the design specification and implementation, define new verification scope as per design or verification methodology requirements, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.

• Collaborate with multiple verification teams, architects, designers, and pre and post silicon verification teams to accomplish your tasks.

What we need to see:

• Bachelors or Masters degree with 5+ years of experience in Unit/Sub-system/SOC level verification

• Expertise in either SystemVerilog or e

• Expertise in comprehensive verification ofindustry standardIP or interconnect protocols (e.g. PCI Express,CXL, UCIe,USB, SATA)

• Experience in developing and working in functional coverage based constrained random verification environments

• Background in verification methodologies like UVM, Specman/e

• Experience with re-usable testbench architecture and its development

• Exposure to industry standard verification tools for simulation and debug

Ways to stand out from the crowd:

• Familiarity withUVM and Specman/e based verification methodologies

• Good knowledge of PCIE protocol - Gen3 and above

• Good debugging and analytical skills

• Good interpersonal skills & dream to work as a great teammate