Amazon Sr RF Silicon CAD Engineer ASIC 

United States, California, Sunnyvale 

66195061

The Role:
As Senior RF Silicon CAD engineer you will be responsible for installing and maintaining the RFIC design environment for the Kuiper Silicon Team. This is an opportunity to define the CAD environment and design flow for upcoming new projects. You’ll advise on tools selection, and interface with various EDA tools vendors and foundries to run the EDA tools, setup PDKs, and install IPs to enable efficient development of custom silicon. You will also be responsible for maintaining the silicon data management tools used to setup tools versions, PDK, and design collateral for each individual chip project. Another key aspect to the role is to interact with the various silicon development teams to establish the right pace and priority for tools upgrades and trouble ticket resolution. In this role you will be following up with the vendors of the status of bug fixes and releases, install them on our server and have it spot tested before release to Engineering.In this role you will: Work closely with semiconductor foundries on installation, maintenance and development of Process Design Kits (PDKs).
 Work closely with the EDA tool vendors (Cadence, Mentor, Synopsys, etc.) to improve design methodology and design flow, and resolve tool bugs.
 Download, install, and maintain analog/RF front/back IP from IP vendors.
 Assist with the setup, maintenance and support of configuration management systems (e.g., Percipient, Perforce), for Linux and Windows users. Work with IT on planning, installation and configuration of high-performance compute (HPC) clusters. Develop, maintain and support various scripts and tools used by designers to submit jobs to HPC scheduled clusters.
 Provide general direct user support and system administration assistance to users, within primarily a Linux computing environment, including assistance with the installation and setup of EDA software tools.
 Participate in contract negotiations with EDA tools vendors and analog/RF IP providers.
Export Control Requirement:

 Bachelor’s degree in Electrical or Computer Engineering or related field, or equivalent experience.
 5+ years of experience with silicon development cycle and RFIC design tools in FinFET and/or GAA processes.
 Experience with Perl/Python/Tcl/SKILL scripting and working in UNIX environment.
 Experience with silicon foundry PDK customization and integration.

 Master’s degree in Electrical or Computer Engineering or related field, or equivalent experience.
 7+ years of experience with silicon development cycle and RFIC design tools in FinFET and/or GAA processes.
 Experience with analog, mixed signal or digital IC design engineering experience.
 Broad IT and shell scripting knowledge.
 Broad knowledge of foundry design kits and skill code expertise.
 Proficiency with Linux and Windows computer systems and networks for EDA-CAD and general applications (EDA-CAD systems administration).
 Proficiency in writing Linux shell scripts and general programming (e.g., Perl, shell, TCL and/or Python).
 Familiarity with compute server grid systems and server load balancing software.
 Familiarity with developing and maintaining a silicon design environment comprised of EDA software such as Cadence Virtuoso, Mentor, EMX, and Ansys-HFSS.
 Familiarity with digital flow: synthesis, simulation, verification, and regression tools.
 Excellent oral and written communications skills.