Required Qualifications
- 7+ years of related technical engineering experience
- OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
- OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
- OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- + years experience in a role that involves transistor-level mixed-signal design.
- 4+ years experience withCadence Virtuoso for schematic capture and simulation setup to analyze and performpreand post-layout simulations of the analog basic building blocks across PVT.
Other Qualifications:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Preferred Qualifications:
- Demonstrated experience in design through volume production of modern SOCs
- Experience with Foundry Silicon and packaging technologies.
- Proficient with the latest mixed-signal design flows and tools.
- Experience with Power Delivery or Power Management Circuits
- Experience with Design Flow automation and scripting.
- Analyze and drive characterization and test data from lab and high-volume testing.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
Microsoft will accept applications for the role until January 31, 2025.