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Intel Senior Analog Circuit Design Engineer 
United States, Texas 
189566713

14.04.2025
Job Description:

Detailed Job description below

  • Designs, develops, and builds analog circuits in advanced process nodes for analog and mixed signal IPs.

  • Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models.

  • Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results.

  • Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals. Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues.

  • Optimizes performance, power, area, and reduces leakage of circuits. Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/researchand/or relevant previous job and/or internship experiences.Minimum Qualifications:

  • Bachelor's Degree in electrical or computer engineering or a related field and 6+ years' relevant experience; OR

  • Master's Degree in electrical or computer engineering or a related field and 5+ years' relevant experience OR

  • Ph.D in Electrical or computer engineering or related field and 3 year's relevant experience

Relevant Experience includes the following:

  • Experience with circuit design, layout, circuit reliability tools/methodologies (IE: Cadence, Synopsys, etc.)

  • Design Experience in multiple analog projects through execution cycle

  • Experience using industry standard analog design tools from EDA vendors


Preferred qualifications:

  • Experience with analog design on advanced process nodes (either Intel or external foundry preferred)

  • Experience with DDR IO analog design

  • Experience with developing IO system models for signal integrity and/or power integrity analysis.

Experienced HireShift 1 (United States of America)US, Oregon, HillsboroUS, California, Folsom, US, California, Santa Clara
Position of Trust

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