Microsoft Senior Analog Design Engineer 

United States, Oregon, Hillsboro 

530537167

Silicon Manufacturing and Package Engineeringand industry knowledge to envision and implement future technical solutions that will manage andthe Cloud infrastructure.

Required Qualifications:

7+ years of related technical engineering experience

o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience

o OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

• + years of experience in a role that involves mixed-signal design.

• + years of experience working with large cross-functional teams with diverse opinions.

Other Requirements:

to meet Microsoft, customer and/or government security screening requirementsfor this role. These requirements include but are not limited to the following specialized security screenings:

Preferred Qualifications:

• experience in design through volume production of modern SOCs
• Experience with Foundry Silicon and packaging technologies.
• Proficient with the latest mixed-signal design flows and tools.
• Experience with Power Delivery or Power Management Circuits
• Experience with Design Flow automation and scripting.
• Analyze and drive characterization and test data from lab and high-volume testing.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:Microsoft will accept applications for the role until Aug 8, 2024.

• to designandintegratethe analogbuilding blocks into biggersystemsfor example: Analog to Digital Converters (ADC), Digital to Analog Converters (DAC), Linear Regulators (LDO), Phase Locked Loops (PLL), Temperature Sensors, DC-DC converters.

• Use industry EDA tools (Cadence, Mentor, or Synopsys) for schematic capture and simulation setup to analyze and performpreand post-layout simulations of the analog basic building blocks across PVT.

• Design, model, and simulate Power Delivery Solutions (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance.

• Support the Mixed Signal Design Engineer with top level simulations to ensure the correct integration of analog, digital and software components.

• develop test plans andensure that the design can be efficiently and fully tested in production.

• Participate in design reviews and create the necessary design and product documentation.

• Supervise IC layouts to achieve theoptimaldesign performanceand power.

• Support Root Cause and Failure Analysis investigations.

• Work with multi-disciplinary and international project team members.

Embody our and