Cisco ASIC Design Engineer 

Armenia, Yerevan 

547747254

• Participate in all aspects of digital design, from micro-architecture to RTL design and qualification.
• Engage in sub-system and SoC integration and verification processes.
• Review and enhance RTL codes to ensure optimal performance.
• Improve flows and methodologies to streamline IP and SoC development and integration.
• Collaborate closely with the verification team to address and resolve complex debug and verification failures.
• Interact with the physical design team to achieve better physical design quality of results (QoR).

• Over 5 years of industry experience in ASIC digital design.
• Proficiency in Verilog/System Verilog coding.
• Experience with front-end tools such as Verilog simulators, linting, CDC checkers, synthesis, and formal verification.
• Experience with automation and scripting languages like Python, Tcl, and Make.
• Proficient in English communication.

• Experience with industry-standard interface protocols such as AMBA (AXI, APB, AHB), JTAG, and memory interfaces.
• Familiarity with power optimization techniques, power intent (UPF), and power estimation.
• Familiarity with DFT/MBIST.

But “Digital Transformation” is an empty buzz phrase without a culture that allows for innovation, creativity, and yes, even failure (if you learn from it.)