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In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
Identify key behaviors for verification to write clear testplans for complex designs.
Implement testplans using innovative formal techniques.
Drive tools to realize their best performance.
Develop flow and script to automate and improve team efficiency.
Collaborate with other teams to help produce bug free, outstanding silicon products.
What we need to see:
BS/MS/Ph.D. or equivalent experience in CS/CE/EE/Mathematics
Strong analytical and collaboration skills to solve complex problems.
Strong coding skills in C, Perl, Python or any other industry-standard scripting languages
Good debugging skills
Excellent communication skills, able to effectively collaborate and work with members of a distributed team.
Ways to stand out from the crowd:
Knowledge of formal verification methodologies, techniques and tools like Jasper.
Hands-on experience with Verilog / System Verilog HDLs, SVA assertions, and able to understand complex RTL code quickly.
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