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What you'll be doing:
Implement testing architecture of VLSI
Generating test patterns and chip bringup
Develop testing methodology for VLSI
Develop design flow for testing
What we need to see:
Master degree of Electrical Engineering/Computer Engineering/Computer Science, or related equivalent experience
Good understanding of Design for Testing including Scan/ATPG/BIST/JTAG
Familiar with Verilog
Experiences with RTL and Simulation.
Understanding of Timing is a plus
Skills of C/C++/Perl/Tck is a plus
Ways to stand out from the crowd:
Strong English communication
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