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Google IC Packaging Power Integrity Engineer Silicon 
United States, California, Mountain View 
21282835

06.05.2025
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
  • 8 years of industry experience with leading mobile SoC PKG power integrity and achieved mass production.
  • Experience with electromagnetic, transmission line, and circuit design.
  • Experience with power integrity frequency domain and time domain modeling, simulation, and correlation.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
  • 12 years of experience with owning multiple generations of mobile SoC PKG PI.
  • Experience with EDA tools such as Ansys HFSS, Q3D, SiWave; Cadence PowerSI, Clarity, PowerDC, Allegro, APD, Spectre; Keysight ADS, Synopsys Hspice and PDN design, modeling, optimization, simulation, lab measurement correlation with lab measurement, validation and correlation on package, die and PCB level.
  • Knowledge of on-chip power analysis flow (e.g. PTPX, Redhawk, Voltus) and SoC physical design (e.g. floor plan) with high speed oscilloscopes, TDR and VNA.