Microsoft Director Physical Design 

Taiwan, Taoyuan City 

175201132

engineers to help achieve that mission.

and industry knowledge to envision and implement future technical solutions that will manage andthe Cloud infrastructure.

Required/minimum qualifications

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR Equivalent Experience.

• 7+ years of experience in physical design implementation, signoff at block / sub system / sub-chip / SoC level.

• 7 + years of experience intapeoutsof complex ASICs in leading edge technology

Other Qualifications:

• Abilityto meet Microsoft, customer and/or government security screening requirementsarerequired for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
• This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

• implementationand execution plan for aschip/SOC,execute the plan for successfultapeoutby working with various stakeholders(RTL, IP, Methodology, DFT, Architectureetc)anddrive theto achieve the best performance, power, and area (PPA) for AI system-on-chips (SOCs). This will involveoptimizingtechnology, libraries, physical design, RTL design, and architecture.
• Leading the team in defining the implementation and execution plan for asubchip/SOC.
• Collaborating with various stakeholders such as RTL designers, IP teams, Methodology experts, DFT engineers, and Architects to ensure a cohesive plan.
• Executing the defined plan to ensure successfultapeoutof thesubchip/SOC.
• Driving the team to achieve the best performance, power, and area (PPA) for AI system-on-chips.
• Optimizingtechnology choices, libraries, physical design methodologies, RTL design strategies, and architectural decisions to meet performance targets.
• Ensuring that the physical design aspects align with the overall project goals and timelines.
• Providing technical guidance and mentorship to team members.
• Overseeing the development and implementation of physical design flows and methodologies.
• Collaborating with cross-functional teams to address any design challenges andoptimizethe design for manufacturability.
• Monitoring progress,identifyingrisks, and implementing mitigation strategies to ensure project success.
• Keeping abreast of the latest industry trends, tools, and techniques in physical design to drive innovation and efficiency within the team.
• You are expected to be able to work with limited direction, have keen attention to detail, and be able to provide crisp status of progress, issues, and risks on the program to the management team.  Occasional travel may be