Nvidia Manager Design-for-Test - ATPG 

Israel, Tel Aviv District, Tel Aviv-Yafo 

989409131

What you’ll be doing:

• Managing a team of 10-15 ATPG/scan insertion/DFT Post Si Eng
• Leading the development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.
• Coordinate multi projects execution in parallel
• Leading automation flows and processes that provide the short test time to production

What we need to see:

• 2+ years of proven management experience and skills at the DFT field.
• 5+ overall years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools - advantage
• BSc. in Electrical Engineering or Computer engineering - advantage
• Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility

Ways to stand out from the crowd:

• Managerial experience in the DFT field.
• Knowledge of DFT/ATPG including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
• Experience in Mentor TestKompress ATPG tool and retargeting flow
• Experience with ATE and Silicon bring-up