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QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
About The Role
You will both design key circuit blocks and work closely with layout engineers to ensure the layout is fully optimized and complies with best analog layout practices. You will be directly involved in delivering next-generation SerDes and PLL designs for Qualcomm SoCs and will be part of a large analog mixed-signal design team involved in architecture analysis and IP delivery in leading-edge FinFET process technology nodes at 3nm and beyond.
The role requires industry experience in transistor-level circuit implementations or highly relevant academic experience in a Masters’ or PhD program focused on full custom analog circuit design using nanometer CMOS technologies. In addition to Analog and Mixed-Signal circuit design expertise, good understanding of device physics, analog circuit custom layout, power distribution networks (PDN), mixed-signal design flow, SoC top-level integration and IC Design Tools are desired.
Responsibilities:
Architecture, design, and development of analog / mixed signal hard macros for the SerDes IP Design team
Perform custom circuit design in the latest FinFET CMOS processes technologies and beyond to support the delivery of SerDes IP
Participate in internal customer requirements discussions.
Create design specifications.
Create behavioural models in Verilog.
Set-up, run and analyse circuit simulations.
Perform quality assurance procedures on developed hard macros.
Deliver hard macros and support customer integration and testing.
Perform silicon characterization analysis and prepare silicon verification reports.
Skills and Experience we would love to see:
Master’s or Ph.D. degree in Science, Engineering, or related field.
A minimum of 2-years of transistor level analog mixed-signal design experience, preferably in high-speed wireline SerDes, PLL, DDR or other high speed applications
Experience in SPICE simulators and schematic capture tools
Experience in designing op-amps, bandgaps, differential amplifiers, VCO, PLL, DLL
Experience in high-speed SerDes block level designs such as transmitters, receivers, high speed VGA, CTLE, CDR, etc.
Understanding of signal integrity in high-speed wireline design is preferred
Scripting to automate circuit design and verification work
Full-custom analog layout techniques and the ability to take a design and do all the layout extract verification and sign-off
Excellent communication skills and ability to contribute strongly within a high-performance team
Where you will be working
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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