Principal Engineer Hardware Validation jobs at Marvell in Vietnam, Ho Chi Minh City
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Vietnam
Ho Chi Minh City
4 jobs found
03.05.2025
M
Marvell Principal Engineer Hardware Validation Vietnam, Ho Chi Minh City
Design and implement advanced DFT architectures to ensure comprehensive testability in complex ASIC/VLSI designs. Develop and optimize test methodologies such as JTAG, SCAN, MBIST, and Boundary Scan (BScan) for maximum...
What You Can Expect Develop UVM testbench at block level and SOC level for complex ASIC System On Chips Run RTL and gate level functional verification, debug failures, analyze and...
Work on all aspects of DFT (Design for Testability) for networking domain products, including architecture, testability strategy, flow, implementation, verification, and post-silicon bring-up. Collaborate with DFT team members for feature...
Collaborate with the Architecture team to define the micro-architecture of the chip. Develop specifications and micro-architecture for one or more blocks. Implement RTL coding using best practices. Work with physical...
Design and implement advanced DFT architectures to ensure comprehensive testability in complex ASIC/VLSI designs. Develop and optimize test methodologies such as JTAG, SCAN, MBIST, and Boundary Scan (BScan) for maximum...
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