Asic Engineering Technical Leader Design jobs at Cisco in United States, San Jose
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Company (1)
Job type
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Job title (1)
United States
State
San Jose
196 jobs found
10.03.2025
C
Cisco ASIC Design Engineer United States, California, San Jose
Development of high-performance designs/ASICs from specification to tape-out. Author micro-architecture specifications and participate in specification and test plan reviews. Architect and implement complex RTL designs. Implement Verilog RTL to meet...
Lead the design and deployment of end-to-end ML solutions for real-world applications. Develop and fine-tune transformer-based models for diverse AI challenges. Work across modeling, ML infrastructure, system development, and deployment....
Provide expert advise and counsel within and outside the organization, influencing the development of multi-year strategies. Lead the full lifecycle of networking programs, managing schedules, scope, risks, resources, and progress...
Design and develop thermal solutions (air-cooled or liquid-cooled) for systems with high-power ASICs and QSFP-DD. Develop detailed package, board, and system-level simulations using Computational Fluid Dynamic (CFD) tools to simulate...
Development of high-performance designs/ASICs from specification to tape-out. Micro-architectural definition, writing micro-architecture and implementation specifications. Implement Verilog RTL to meet timing and performance requirements. Help define, evolve, and support our...
Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. Option to also do...
Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs. Responsible for development of innovative DFT IP in collaboration with...
Development of high-performance designs/ASICs from specification to tape-out. Author micro-architecture specifications and participate in specification and test plan reviews. Architect and implement complex RTL designs. Implement Verilog RTL to meet...
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