The point where experts and best companies meet
Share
What you'll be doing:
Define and implement tools and methodologies for efficient data generation from post layout netlists to feed into data movement power analytical model.
Develop tools and infrastructure to sanitize each metric in the model to achieve high correlation accuracy.
Define and implement tools and methodologies for efficient integration of power models with performance tools.
Identify runtime and memory limitation of existing flows and tools to speedup model delivery process.
Mine data from pre- and post-silicon performance runs to find important data paths and bottlenecks. Give feedback to design teams and improve power efficiency.
Work with floorplan, performance, verification and emulation methodology and infrastructure development teams to integrate data movement power models.
Experiment with various ML techniques to answer what-if design questions and set proper power/energy targets for next generation chips.
Enable efficient storage and retrieval of data from database.
Enable easy visualization of data using platforms such as PowerBI, OpenSearch.
What we need to see:
MS or PhD in related fields or equivalent experience.
Strong coding skills, preferably in Python, C++.
Ability to formulate and analyze algorithms, and comment on their runtime and memory complexities.
Understanding of VLSI, digital design, and computer architecture concepts.
Basic understanding of fundamental concepts of power and energy consumption, estimation, and low power design.
Basic understanding of chip design process from RTL design to tape-out.
Background in machine learning, AI, and/or statistical modeling is a plus.
Desire to bring quantitative decision-making and analytics to improve the energy efficiency of our products.
You will also be eligible for equity and .
These jobs might be a good fit