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Apple Emulation Verification Engineer United States, California, Cupertino 992551798
02.05.2024
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Key Qualifications
- Proven experience with bring up, debugging and verification in Emulation
- Understanding of the tool flow from RTL to Emulation is a big plus
- Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) or FPGA (Xilinx, Altera) flow
- Proven design verification skills
- Experience in writing Synthesizable SystemVerilog/Verilog code and SystemVerilog assertions
- Experience with System Verilog verification environments including C/C++ DPI, UVM
- Experience on any Scripting (Perl/Python/TCL)
- Excellent analytical and debug skills
- Excellent oral and written English skills
- Experience in UVM Acceleration is plus
Description
As a member of the Emulation Verification team, you will play a key role using Emulation for verification of mixed signal SoCs, which have large digital and analog sections. You will be responsible for porting the design to the Emulation platform with the help of the Emulation team and then driving the verification plan.Core responsibilities will include:- Bringing up the emulation platform for mixed signal SoCs- Developing monitors and checkers for Emulation platform and come up with the latest techniques to achieve better performance- Developing code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM
Education & Experience
BS and 10+ years of relevant industry experience required.
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $170,700.00 and $300,200.00, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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