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Apple Emulation Verification Engineer United States, California, Sunnyvale 66273362
07.04.2025
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As an Emulation Verification engineer, you will play a key role in preparing the wireless SoCs ready for emulation build by adding suitable monitors/checkers and sanitizing with testcases in emulation TB. Once the emulation build is ready, you will work on coming up with acceptance tests and executing the same on the emulation platform.
In this role, core responsibilities include, but are not limited to, the following:• Work closely with emulation team to bring up large Wireless SoCs along with their mixed signal components in emulation platform.• Develop/utilize monitors/checkers on emulation platform.• Preparing and executing the test plan and performing reviews with the cross functional teams.• Collaborating cross functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams.• Developing code for Design and verification that aids with emulation activities using Verilog/System Verilog/UVM.
- BS and 3+ years of relevant experience.
- Hands-on experience with bring up, debugging and verification in Emulation.
- Proven Design Verification Skills.
- Experience with System Verilog verification environments including C/C++ DPI, UVM.
- Understanding of the tool flow from RTL to Emulation.
- Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions.
- Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow.
- Experience on any Scripting (Perl/Python/TCL).
- Excellent analytical and debug skills.
- Experience in UVM Acceleration is plus.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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