Amazon ASIC Physical Design Engineer Intern Annapurna Labs 

United States, California, Cupertino 

991073402

Key job responsibilities
• Perform physical design for Amazon's machine learning custom silicon solutions
• Participate in various aspects of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and physical verification
• Write Tcl or PERL scripts to improve physical design flows and methods
• Collaborate with RTL, DFT designers to ensure high quality design implementation

• Enrolled in a Bachelors’ degree program or higher in Electrical Engineering, Computer Engineering, or a related field with a graduation conferral date between December 2024 and September 2025
• Scripting internship/project experience with Python, Perl or equivalent
• Strong understanding of VLSI circuit design fundamentals
• Have taken at least one or more VLSI circuit design and implementation classes and done lab projects

• Enrolled in a Master’s degree program in Electrical Engineering or Computer Engineering
• Previous relevant technical internship experience
• Experience with FinFET design, Clock/Power Distribution, Spice Circuit analysis
• Experience with Place and Route, digital implementation
• Experience with EDA tools from Synopsys (ICC2, DC, PT), Cadence (Genus, Innovus, Voltus)
• Experience with Verilog/SystemVerilog