• Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle.• Drive best in class PD construction and optimization recipes for performance, power and area (PPA).• Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.• Work on pioneering designs in the latest technology nodes.• Be a focal point for place and route drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block place and route.• Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.• Work multi-functionally to ensure delivery of best-in-class physical implementations geared towards world class products.