• Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle.• Drive outstanding PD construction and optimization recipes for performance, power and Area (PPA).• Work on pioneering designs in the latest technology nodes.• Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.• Drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block PnR.• Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.