Qualcomm ASIC Digital Design Engineer 

United States, California, San Jose 

970252982

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Preferred Qualifications:

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

• 6+ years of ASIC design, verification, validation, integration, or related work experience.

• 2+ years of experience with architecture and design tools.

• 2+ years of experience with scripting tools and programming languages.

• 2+ years of experience with design verification methods.

• 1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).

Principal Duties & Responsibilities:

• Leverages advanced ASIC knowledge and experience to define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.

• Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.

• Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.

• Evaluates all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.

• Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages.

• Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects.

Level of Responsibility:

• Works independently with minimal supervision.

• Provides supervision/guidance to other team members.

• Decision-making is significant in nature and affects work beyond immediate work group.

• Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.

• Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).

• Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$153,200.00 - $229,800.00