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Cisco Analog/mixed United States, Georgia, Atlanta 966070120
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Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.
What you'll do:
As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed (>25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products.
You will lead efforts for a large block on a complex chip, mentor team members and track deliverables, participate in peer review of complex IC designs and provide solid design methodology from conception to production.
You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met.
Who you’ll work with:
You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design.
Who you are:
You are enthusiastic about developing high speed AMS circuits and best-in-class products that push the boundaries of what is possible. You are detail oriented, high energy and the drive to get things done and solve difficult problems.
Minimum requirements:
- BSEE degree with 8+ years of experience, or equivalent, an MS degree with 6+ years of experience, or equivalent, or a PhD with 3+ years of experience, or equivalent.
- Design, simulation and measurement of high speed ICs in at least 3 areas below:
-High Speed Serial Links utilizing serializers, deserializers, and data convertors.-Voltage Regulators-High Performance Output Drivers-High Performance Phase Locked Loops-Efficient clock Transmission/propagation-Opamps and Programmable Gain Amplifiers
Preferred Requirements:
- Direct experience with electrical transceiver applications including backplane and cable communications
- Experience with FinFET technology
-High-frequency layout experience a plus: Passive component design: inductors, -transformers, transmission-lines, etc.-Floorplanning (power/ground, digital/analog signal routing, etc.)-Custom transistor layout
-Characterization over PVT (monte-carlo analysis)-Electromigration analysis (using Totem, or equivalent)-Power and IR drop analysis
Laboratory Validation:
-Solid ESD laboratory practices and methodology-Construction of test setup to test specific circuitry
Software Experience:
-Experience in the use of high frequency test equipment (BERT, jitter analyzers, VNA/PNA, etc.)
-Cadence (virtuoso)-Layout validation tools (Virtuoso or Calibre)-Post-layout Extraction (Virtuoso or Calibre)-Mixed signal simulations in AMS
We tackle whatever challenges come our way. We have each other’s backs, we recognize our accomplishments, and we grow together. We celebrate and support one another – from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).
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