Cisco Analog/mixed 

Canada, Ontario, Ottawa 

875741967

Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.

As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed (>25Gb/s), and high accuracy, analog designs for optical communications products. You will assist in the architecture of behavioral models and IBIS-AMI models of interfaces to productize ultra-deep sub-micron-based CMOS products.

You will lead efforts to develop behaviour models and complex IBIS-AMI models of the analog IO development. This will require you to collaborate with packaging and hardware design teams to ensure models accurately represent the device performance. You will also assist applications engineering in model supports.

You will work with other Acacia mixed-signal, System, and Hardware Engineers to collaborate in order to provide optimized, accurate models that will be used for system and signal integrity investigations. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, package design, and module design. The position will require customer interaction in supporting the released models.

You are enthusiastic about modeling high speed AMS circuits and best-in-class products that push the boundaries of what is possible. You are detail oriented, high energy and the drive to get things done and solve difficult problems.

BSEE degree with 8+ years of experience, or equivalent, an MS degree with 6+ years of experience, or equivalent, or a PhD with 3+ years of experience, or equivalent.

Behaviour and IBIS-AMI modeling of high-speed IC in most of the areas below:

• High Speed Serial Links utilizing serializers, deserializers, and data convertors.
• High Performance Output Drivers
• High Performance Phase Locked Loops
• Phase interpolators
• Programmable Gain Amplifiers
• Equalization techniques (CTLE, FFE, DFE)
• Clock and Data Recovery
• Jitter analysis and attenuation techniques

• Direct experience with electrical transceiver applications including backplane, optical, and cable communications
• Direct experience and familiarity of IEEE 802.3 and CEI standards using multiple modulation schemes
• Direct experience in signal integrity analysis.
• Proven track record of innovation
• Publications

• C/C++
• Advance Design System (ADS)
• Matlab/Simulink
• Cadence (virtuoso)
• Spectre/APS/SpectreX
• Mixed signal simulations in AMS
• Python

We tackle whatever challenges come our way. We have each other’s backs, we recognize our accomplishments, and we grow together. We celebrate and support one another – from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).