Qualcomm Wireless HW Synthesis Front-end Implementation – Senior Lead Engineer 

India, Karnataka, Bengaluru 

963750762

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Overview - High-speed and Low-power 5G Modem Hardmacro Implementation

· Front-end implementation of complex 5G hardmacro designs in advanced process nodes

· Primary tasks include writing timing constraints, power-aware synthesis, power-aware formal verification, CLP, Primetime, PTPX, CECO

· Optimize datapath design for low-area, low-power and high-frequency, using advanced features in synthesis such as MCMM, SAIF, multibit mapping, self-gating, congestion reduction recipes, etc.

· Optimize PPA using the right tool options and stdcell libraries / memories

· Handle complex digital blocks with upto 4M gates in advanced process nodes from 2nm / 3nm / 4nm

· Work closely with RTL, DFT and PD leads worldwide to take a project from Post-RTL to Netlist release to MTO, and converge on area, timing, power and testability

Minimum Qualifications – 4-8 years experience in Digital ASIC / Processor Design with a leading chipset company

· Experience in Synthesis (FC, DC, Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO

· Experience in UPF based power intent and synthesis, handling MV checks and CLP waiver reviews

· Strong fundamentals in core areas: Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology

· Strong communication skills to work with design teams worldwide

· Ability to lead a moderate-size project with 3-4 engineers, and mentor junior engineers and new college grad engineers

Education Requirements Required: Bachelor's, Electrical Engineering

Preferred: Master's, Electrical Engineering

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.