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Job Area:
Engineering Group, Engineering Group > ASICS Engineering
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field.
Qualifications
The ideal candidate would possess the following qualifications:
Master’s degree in science, Engineering or related field
2+ years of professional or academic experience with RTL design or verification of digital IPs
Design verification knowledge and experience with design testbench suites.
Good understanding of OOP concepts. Experience in HVL such as System Verilog, UVM/OVM & System C
Familiarity with Power-aware Verification is a plus
Good working knowledge of synthesis and STA
Knowledge of low power design techniques
Ability to work with transistor-level circuit designers
Familiarity with ASIC backend integration tools for PNR is a plus
Familiarity with IP delivery collaterals including behavior model, upf libs, LEF view, etc is a plus
Automation knowledge (python) etc. will be a significant plus
Minimum Qualifications:
Education:Bachelors – Electrical Engineering, Bachelors - Science
Work Experiences:2+ years ASIC design, verification, or related work experience
Should be able to use simulation and formal verification methodologies to execute test plans, write checkers, assertions and develop stimulus.
Strong knowledge in digital logic design (Data path and Finite Sate Machine (FSM) Design)
Skills: Verilog, System Verilog, Perl, Circuit Design
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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