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Google Design Verification Engineer Silicon India, Karnataka, Bengaluru 948097311
01.04.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 2 years of experience verifying digital logic at RTL using SystemVerilog for FPGAs and ASICs.
- Experience verifying Digital IP, Subsystems, and testbenches.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science with 2 years of relevant experience.
- Experience creating/using verification components and environments in methodology (VMM, OVM, UVM).
- Experience with Verification Techniques.
- Familiarity with ASIC standard interfaces.
- Proficiency with Design Verification protocols.
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